Title

Managing Defects In Dram Stack Capacitors Using In-Line E-Beam Inspection

Abstract

DRAM-stacked capacitor structures require high-aspect-ratio contacts, and the narrow etch process window adds risk of yield excursions whenever the contacts are not well formed. An alternative method for detecting yield-limiting defect excursions at reduced cost involves electron beam inspection prior to the landing plug poly (LPP) CMP step. The use of new electron beam tool features, such as ultra-low beam current, low landing energy, and pre-charging techniques, allows for inspection at the landing poly contact (LPC) etch step. This new inspection detects defects more than two days earlier than prior techniques, and eliminates the need to scrap wafers as part of the inspection process.

Publication Date

3-1-2007

Publication Title

Solid State Technology

Volume

50

Issue

3

Number of Pages

52-53

Document Type

Article

Personal Identifier

scopus

Socpus ID

34247098919 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/34247098919

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