Surface Roughness Effect On Gate Leakage And C-V Characteristics Of Deep Submicron Mosfets
The impact of the surface roughness on the gate tunneling and capacitance of ultra-thin gate dielectrics was studied. It was found that the surface roughness has a profound influence on the oxide reliability prediction and capacitance-voltage (C-V) characteristics. The distortion of the C-V curves was attributed to direct tunnelling and surface roughness in addition to series resistance effect.
International Integrated Reliability Workshop Final Report
Number of Pages
Article; Proceedings Paper
Source API URL
Zhang, Jinlong; Yuan, Jiann S.; and Ma, Yi, "Surface Roughness Effect On Gate Leakage And C-V Characteristics Of Deep Submicron Mosfets" (2000). Scopus Export 2000s. 735.