Title
Surface Roughness Effect On Gate Leakage And C-V Characteristics Of Deep Submicron Mosfets
Abstract
The impact of the surface roughness on the gate tunneling and capacitance of ultra-thin gate dielectrics was studied. It was found that the surface roughness has a profound influence on the oxide reliability prediction and capacitance-voltage (C-V) characteristics. The distortion of the C-V curves was attributed to direct tunnelling and surface roughness in addition to series resistance effect.
Publication Date
12-1-2000
Publication Title
International Integrated Reliability Workshop Final Report
Number of Pages
133-136
Document Type
Article; Proceedings Paper
Personal Identifier
scopus
Copyright Status
Unknown
Socpus ID
0034430320 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/0034430320
STARS Citation
Zhang, Jinlong; Yuan, Jiann S.; and Ma, Yi, "Surface Roughness Effect On Gate Leakage And C-V Characteristics Of Deep Submicron Mosfets" (2000). Scopus Export 2000s. 735.
https://stars.library.ucf.edu/scopus2000/735