Title

A New Approach To Characterize And Predict Lifetime Of Deep-Submicron Nmos Devices

Abstract

Experimental results are presented to indicate that the widely used power-law models for lifetime estimation are questionable for deep submicron (< 0.25 μm) MOS devices, particularly for the case of large substrate current stressing. This observation is attributed to the presence of current components, such as the gate tunneling current and base current of parasitic bipolar transistor, that do not induce device degradation. A more effective extrapolation method is proposed as an alternative for the reliability characterization of deep-submicron MOS devices. © World Scientific Publishing Company.

Publication Date

3-1-2006

Publication Title

International Journal of High Speed Electronics and Systems

Volume

16

Issue

1

Number of Pages

315-323

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1142/S0129156406003667

Socpus ID

33747676059 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/33747676059

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