Title

Reconciling The Ic Test And Security Dichotomy

Abstract

Many of the design companies cannot afford owning and acquiring expensive foundries and hence, go fabless and outsource their design fabrication to foundries that are potentially untrustwrothy. This globalization of Integrated Circuit (IC) design flow has introduced security vulnerabilities. If a design is fabricated in a foundry that is outside the direct control of the (fabless) design house, reverse engineering, malicious circuit modification, and Intellectual Property (IP) piracy are possible. In this tutorial, we elaborate on these and similar hardware security threats by making connections to VLSI testing. We cover design-for-trust techniques, such as logic encryption, aging acceleration attacks, and statistical methods that help identify Trojan'ed and counterfeit ICs. © 2013 IEEE.

Publication Date

9-9-2013

Publication Title

Proceedings - 2013 18th IEEE European Test Symposium, ETS 2013

Number of Pages

-

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ETS.2013.6569368

Socpus ID

84883327945 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84883327945

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