Title

Reference Voltage Generation Scheme Enhancing Speed And Reliability For 1T1C-Type Fram

Abstract

An improved reference voltage generation scheme is proposed for a 1T1C-type ferroelectric random access memory (FRAM), in which the circuit referring to reference cells is redefined and the data are written into reference cells at random between '1' and '0' depending on the voltages of the bitlines during every operation cycle. Compared with conventional schemes, it can not only realise higher access speed for memory, but also can enhance its reliability by resolving the imprint and relieving the fatigue relating to ferroelectric capacitors in the device. Functional verification for the experimental prototype utilising the proposed scheme has been implemented. © 2014 The Institution of Engineering and Technology.

Publication Date

1-30-2014

Publication Title

Electronics Letters

Volume

50

Issue

3

Number of Pages

154-156

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1049/el.2013.3193

Socpus ID

84893341045 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84893341045

This document is currently not available here.

Share

COinS