Title

Nv-Clustering: Normally-Off Computing Using Non-Volatile Datapaths

Keywords

energy-sparing computation; logic-in-memory architecture; memory-in-logic datapath; Non-volatile computing architecture; non-volatile flip-flop; non-volatile logic; normally-off computation; spin-transfer torque (STT) switching

Abstract

With technology downscaling, static power dissipation presents a crucial challenge to multicore, many-core, and System-on-Chip (SoC) architectures due to the increased role of leakage currents in overall energy consumption and the need to support power-gating schemes. Herein, a non-Volatile (NV) flip-flop design approach, referred to as NV Clustering, is developed to realize middleware-transparent intermittent computing. First, a Logic-Embedded Flip-Flop (LE-FF) is developed to realize rudimentary Boolean logic functions along with an inherent state-holding capability within a compact footprint. Second, the NV-Clustering synthesis procedure and corresponding tool module are utilized to instantiate the LE-FF library cells within conventional Register Transfer Language (RTL) specifications. This selectively clusters together logic and NV state-holding functionality, based on energy and area minimization criteria. NV-Clustering is applied to a wide range of benchmarks including ISCAS-89, MCNS, and ITC-99 computational circuits using a LE-FF based on the Spin Hall Effect (SHE)-assisted Spin Transfer Torque (STT) Magnetic Tunnel Junction (MTJ). Simulation results validate functionality and power dissipation, area, and delay benefits. For instance, results for ISCAS-89 benchmarks indicate 15 percent area reduction on average, up to 22 percent reduction in energy consumption, and up to 14 percent reduction in delay as compared to alternative NV-FF based designs, as evaluated via SPICE simulation at the 45-nm technology node.

Publication Date

7-1-2018

Publication Title

IEEE Transactions on Computers

Volume

67

Issue

7

Number of Pages

949-959

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TC.2018.2795601

Socpus ID

85040927656 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85040927656

This document is currently not available here.

Share

COinS