Brief Announcement: Parallel Transitive Closure Within 3D Crosspoint Memory

Abstract

The infamous memory-processor bottleneck has motivated the search for logic-in-memory architectures. In this paper, we demonstrate how the transitive closure problem can be solved through in-memory computing within a 3D crosspoint memory. The proposed architecture requires only two layers of 1-diode 1-resistor (1D1R) interconnects and external feedback loops.

Publication Date

7-11-2018

Publication Title

Annual ACM Symposium on Parallelism in Algorithms and Architectures

Number of Pages

95-98

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1145/3210377.3210657

Socpus ID

85051142686 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85051142686

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