A New Method To Estimate Failure Temperatures Of Semiconductor Devices Under Electrostatic Discharge Stresses

Keywords

Electrostatic discharge (ESD); thermal failure; transmission line pulsing (TLP)

Abstract

Thermal runaway is one of the main causes of semiconductor device failure under electrostatic discharge (ESD) stresses. An experimental method to investigate the failure temperature under such electrical stresses is proposed. By extrapolating the power-to-failure under different stress time versus ambient temperature curves to the temperature axis, an effective failure temperature is extracted which represents the real failure temperature. This temperature is observed to be higher than the temperature at which the semiconductor becomes intrinsic. The latter is conventionally regarded as the critical temperature for thermal failure. These findings suggest that a different thermal-related mechanism is responsible for the ESD-induced damage in semiconductor devices.

Publication Date

11-1-2016

Publication Title

IEEE Electron Device Letters

Volume

37

Issue

11

Number of Pages

1477-1480

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/LED.2016.2608328

Socpus ID

85027053123 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85027053123

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