Stochastic-Based Deep Convolutional Networks With Reconfigurable Logic Fabric

Keywords

convolutional neural network; FPGA; Stochastic convolution

Abstract

Large-scale convolutional neural network is a fundamental algorithmic building block in many computer vision and artificial intelligence applications that follow the deep learning principle. However, a typically-sized CNN is well known to be computationally intensive. This work presents a novel stochastic-based and scalable hardware architecture and circuit design that computes a large-scale CNN with FPGA. The key idea is to implement all key components of a deep learning CNN, including multi-dimensional convolution, activation, and pooling layers, completely in the probabilistic computing domain in order to achieve high computing robustness, high performance, and low hardware usage. Our approach has three advantages. First, it can achieve significantly lower algorithmic complexity for any given accuracy requirement. For a N dimensional image feature map, we have theoretically proven that a random sample size of k^∗ \log (N) is sufficient to achieve no more than 0.05 error at 95 percent confidence level, where k is a constant of 510. This computing complexity, when compared with that of conventional multiplier-based architecture, represents on average 8.97\times and 6.98 \times performance improvement for SCNN and Deep SCNN, respectively. Second, this proposed stochastic-based architecture is highly fault-Tolerant because the information to be processed is encoded with a large ensemble of random samples. As such, the local perturbations of its computing accuracy will be dissipated globally, thus becoming inconsequential to the final overall results. More interestingly, our measured results have shown that 0.1 percent degradation in computing accuracy of CNN can actually mitigate the well-known overfitting problem. Overall, being highly scalable and energy efficient, our stochastic-based convolutional neural network architecture is well-suited for a modular vision engine with the goal of performing real-Time detection, recognition, and segmentation of mega-pixel images, especially those perception-based computing tasks that are inherently fault-Tolerant, while still requiring high energy efficiency.

Publication Date

10-1-2016

Publication Title

IEEE Transactions on Multi-Scale Computing Systems

Volume

2

Issue

4

Number of Pages

242-256

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TMSCS.2016.2601326

Socpus ID

85008497151 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85008497151

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