Automated Synthesis Of Stochastic Computational Elements Using Decision Procedures

Abstract

As integrated circuits move into the sub-10nm range, their reliability decreases due to reduced noise margin, radiation-induced errors and manufacturing variations. Stochastic circuits are inherently fault tolerant. Their instrinsic fault tolerance along with their area and power efficiency have made them competitive candidates for energy-hungry multimedia and pattern recogntion applications. We have proposed a new approach for the synthesis of stochastic circuits. We demonstrate the success of our approach by synthesizing polynomial, tanh and exponentiation functions. Our approach that employs decision procedures to effectively explore the space of linear finite state machines guarantees an upper bound on the maximum error between the synthesized function and its stochastic approximation. Our appraoch has resulted in 1.17 to 1.65 times smaller worst-case error as compared to the previous state-of-the-art.

Publication Date

7-29-2016

Publication Title

Proceedings - IEEE International Symposium on Circuits and Systems

Volume

2016-July

Number of Pages

1678-1681

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ISCAS.2016.7538890

Socpus ID

84983381388 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84983381388

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