Ultra-Robust Null Convention Logic Circuit With Emerging Domain Wall Devices

Keywords

Asynchronous circuit; NULL convention Logic; Spintronics and magnetic technologies

Abstract

Despite many attractive advantages, Null Convention Logic (NCL) remains to be a niche largely due to its high implementation costs. Using emerging spintronic devices, this paper proposes a Domain-Wall-Motion-based NCL circuit design methodology that achieves approximately 30x and 8x improvements in energy efficiency and chip layout area, respectively, over its equivalent CMOS design, while maintaining similar delay performance for a 32-bit full adder. These advantages are made possible mostly by exploiting the domain wall motion physics to natively realize the hysteresis critically needed in NCL. More Interestingly, this design choice achieves ultra-high robustness by allowing spintronic device parameters to vary within a predetermined range while still achieving correct operations.

Publication Date

5-18-2016

Publication Title

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volume

18-20-May-2016

Number of Pages

251-256

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1145/2902961.2903019

Socpus ID

84974718037 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84974718037

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