Title

Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching

Keywords

Full adder (FA); magnetic tunnel junction (MTJ); spin-Hall effect (SHE); spin-transfer torque (STT)

Abstract

Magnetic tunnel junction (MTJ)-based devices have been studied extensively as a promising candidate to implement hybrid energy-efficient computing circuits due to their nonvolatility, high integration density, and CMOS compatibility. In this paper, MTJs are leveraged to develop a novel full adder (FA) based on 3- and 5-input majority gates. Spin Hall effect (SHE) is utilized for changing the MTJ states resulting in low-energy switching behavior. SHE-MTJ devices are modeled in Verilog-A using precise physical equations. SPICE circuit simulator is used to validate the functionality of 1-bit SHE-based FA. The simulation results show 76% and 32% improvement over previous voltage-mode MTJ-based FA in terms of energy consumption and device count, respectively. The concatanatability of our proposed 1-bit SHE-FA is investigated through developing a 4-bit SHE-FA. Finally, delay and power consumption of an n-bit SHE-based adder has been formulated to provide a basis for developing an energy efficient SHE-based n-bit arithmetic logic unit.

Publication Date

12-1-2017

Publication Title

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volume

36

Issue

12

Number of Pages

2134-2138

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TCAD.2017.2661800

Socpus ID

85038210162 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85038210162

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