Optimization Of An Enhancement-Mode Algan/Gan/Algan Dhfet Towards A High Breakdown Voltage And Low Figure Of Merit

Keywords

double heterostructure field effect transistor (DHFET); figure of merit optimization; GaN HEMT; gate field plate; power devices

Abstract

Demonstrated in this work are the effects of lateral scaling on the figure of merit (RDS(on)×QG) for a pGaN, enhancement-mode HEMT. To this end, the drift length (Ldrift) and the length of the gate field plate (LGFP) have been scaled to exhibit the influence of these terms on the on-state resistance (RDS(on)), gate charge (QG), and breakdown voltage (VBR). Results conclude that for a given field plate length, the increase in breakdown voltage as LGD increases, saturates when LGD is greater than LGD(sat). For this design, with LGFP at 5 μm, the saturation length LGD(sat) was 6 μm. Novelty of this study comes from a comprehensive look at drift length and field plate optimization for high voltage and low figure of merit designs, specifically for the enhancement-mode pGaN structure. Taking this optimization one step further, we have mapped out RDS(on) and QG to suggest designs which optimize conduction losses versus switching losses for specificity in power electronics system design.

Publication Date

12-7-2017

Publication Title

2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications, WiPDA 2017

Volume

2017-December

Number of Pages

122-126

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/WiPDA.2017.8170533

Socpus ID

85046647306 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85046647306

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