Efficient Fault Localization And Failure Analysis Techniques For Improving Ic Yield

Keywords

Avalon; Defect isolation; Emission microscopy; Fault identification; MaskView; Physical failure analysis; Yield ramp

Abstract

With the increase in the complexity of the semiconductor device processes and increase in the challenge to satisfy high market demands, enhancement in yield has become a crucial factor. Discovering and reacting to yield problems emerging at the end of the production line may cause unbearable yield loss leading to larger times to market. Thus, time and cost involved in fault isolation may be significantly shortened by effectively utilizing the fault diagnosis technology and supporting yield improvements. Hence for yield analysis, a highly integrated data network with software analysis tools have been established to reduce the fault analysis time. Synopsys Avalon, a product used for fault localization is described in this paper which aids in achieving better integrated circuit yields. This paper also illustrates various fault localization techniques for faster problem identification and discusses a few analytical tools like photon emission microscope and transmission emission microscope for faster determination of device failures.

Publication Date

3-1-2018

Publication Title

Electronics (Switzerland)

Volume

7

Issue

3

Document Type

Review

Personal Identifier

scopus

DOI Link

https://doi.org/10.3390/electronics7030028

Socpus ID

85042686190 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85042686190

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