Analysis And Simulation Of Capacitor-Less Reram-Based Stochastic Neurons For The In-Memory Spiking Neural Network

Keywords

Neuromorphic; resistive random-Access memory (ReRAM); spiking neural network; stochastic neuron; unsupervised learning

Abstract

The stochastic neuron is a key for event-based probabilistic neural networks. We propose a stochastic neuron using a metal-oxide resistive random-Access memory (ReRAM). The ReRAM's conducting filament with built-in stochasticity is used to mimic the neuron's membrane capacitor, which temporally integrates input spikes. A capacitor-less neuron circuit is designed, laid out, and simulated. The output spiking train of the neuron obeys the Poisson distribution. Using the 65-nm CMOS technology node, the area of the neuron is 14 ×5 μm 2 , which is one ninth the size of a 1-pF capacitor. The average power consumption of the neuron is 1.289 μW. We introduce the neural array-A modified one-Transistor-one-ReRAM (1T1R) crossbar that integrates the ReRAM neurons with ReRAM synapses to form a compact and energy efficient in-memory spiking neural network. A spiking deep belief network (DBN) with a noisy rectified linear unit (NReLU) is trained and mapped to the spiking DBN using the proposed ReRAM neurons. Simulation results show that the ReRAM neuron-based DBN is able to recognize the handwritten digits with 94.7% accuracy and is robust against the ReRAM process variation effect.

Publication Date

10-1-2018

Publication Title

IEEE Transactions on Biomedical Circuits and Systems

Volume

12

Issue

5

Number of Pages

1004-1017

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TBCAS.2018.2843286

Socpus ID

85049977599 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85049977599

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