C-V Measurement Under Different Frequencies And Pulse-Mode Voltage Stress To Reveal Shallow And Deep Trap Effects Of Gan Hemts
Keywords
C-V measurement; GaN HEMTs; Pulse-mode Stress; Traps
Abstract
In this work, the influence of interface traps at the Si 3 N 4 / (GaN) / AlGaN interface and carbon-related buffer traps on AlGaN/GaN-on-silicon high electron mobility transistors (HEMTs) has been studied using high-frequency capacitance-voltage (HFCV) and quasi-static C-V (QSCV) measurement. The correlation between Ron degradation and two different traps distributions subjected to different operation conditions have been investigated. Deep-level traps from the hole-emission process of carbon-related buffer have been activated by high drain voltage under off-state in pulse-mode condition and shallow-level traps from interface states are observed with an increase in gate voltage under on-state.
Publication Date
12-7-2018
Publication Title
2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications, WiPDA 2018
Number of Pages
103-107
Document Type
Article; Proceedings Paper
Personal Identifier
scopus
DOI Link
https://doi.org/10.1109/WiPDA.2018.8569206
Copyright Status
Unknown
Socpus ID
85060226015 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/85060226015
STARS Citation
Yang, Wen; Yuan, Jiann Shiun; Krishnan, Balakrishnan; Tzou, A. J.; and Yeh, Wen Kuan, "C-V Measurement Under Different Frequencies And Pulse-Mode Voltage Stress To Reveal Shallow And Deep Trap Effects Of Gan Hemts" (2018). Scopus Export 2015-2019. 8861.
https://stars.library.ucf.edu/scopus2015/8861