Keywords

Germanium, Metal oxide semiconductor field effect transistors, Silicon

Abstract

With the development of modern electronics, the demand for high quality power supplies has become more urgent than ever. For power MOSFETs, maintaining the trend of reducing on-state resistance (conduction loss) without sacrificing switching performance is a severe challenge. In this work, our research is focused on implementing strained silicon and silicon germanium in power MOFETs to enhance carrier mobility, thus achieving the goal of reducing specific on-state resistance. We propose an N-channel super-lattice trench MOSFET, a P-channel sidewall channel trench MOSFET and P-Channel LDMOS with strained Si/SiGe channels. A set of fabrication processes highly compatible with conventional Si technology is developed to fabricate proposed devices. The mobility enhancement is observed to be 20%, 40% and 35% respectively for N-channel, Pchannel trench MOSFET and LDMOS respectively and the on-state resistance is reduced by 10%, 20% and 22% without sacrificing other device performance parameters.

Notes

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Graduation Date

2010

Semester

Fall

Advisor

Shen, John

Degree

Doctor of Philosophy (Ph.D.)

College

College of Engineering and Computer Science

Department

Electrical Engineering

Format

application/pdf

Identifier

CFE0003427

URL

http://purl.fcla.edu/fcla/etd/CFE0003427

Language

English

Release Date

December 2010

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Subjects

Dissertations, Academic -- Engineering and Computer Science, Engineering and Computer Science -- Dissertations, Academic

Included in

Engineering Commons

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