Abstract

Vertical double-diffused metal oxide semiconductor (VDMOS) power transistor has been studied. The use of superjunction (SJ) in the drift region of VDMOS has been evaluated using three-dimensional device simulation. All relevant physical models in Sentaurus are turned on. The VDMOS device doping profile is obtained from process simulation. The superjunction VDMOS performance in off-state breakdown voltage and specific on-resistance is compared with that in conventional VDMOS structure. In addition, electrical parameters such as threshold voltage and charge balance are also examined. Increasing the superjunction doping in the drift region of VDMOS reduces the on-resistance by 26%, while maintaining the same breakdown voltage and threshold voltage compared to that of the conventional VDMOS power transistor with similar device design without using a superjunction.

Notes

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Graduation Date

2016

Semester

Summer

Advisor

Yuan, Jiann S.

Degree

Master of Science in Electrical Engineering (M.S.E.E.)

College

College of Engineering and Computer Science

Department

Electrical Engineering and Computer Engineering

Degree Program

Electrical Engineering

Format

application/pdf

Identifier

CFE0006354

URL

http://purl.fcla.edu/fcla/etd/CFE0006354

Language

English

Release Date

August 2016

Length of Campus-only Access

None

Access Status

Masters Thesis (Open Access)

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