Abstract

The objective of this paper is to design and construct a modem using the Quadrature Phase Shift Key digital modulation technique. The modem is designed to transmit information over a telephone line at the rate of 1200 bits per second subject to noise and imperfect channel response in the form of magnitude and delay distortion. The device is constructed using CMOS logic to minimize power consumption. To analyze the design with respect to the above constraints, it was necessary to build a pseudorandom bit sequence generator and correlator, a variable magnitude white noise generator and a digital error detector/indicator.

Graduation Date

1987

Semester

Summer

Advisor

Martin, Robert J.

Degree

Master of Science (M.S.)

College

College of Engineering

Format

Print

Pages

57 P.

Language

English

Rights

Public Domain

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Identifier

DP0021503

Included in

Engineering Commons

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