Author

Jia Di

Keywords

Asynchronous circuits, Electric power -- Conservation

Abstract

Power dissipation has become a major concern for IC designers. Various low power design techniques have been developed for synchronous circuits. Asynchronous circuits, however have gained more interests recently due to their benefits in lower noise, easy timing control, etc. But few publications on energy reduction techniques for asynchronous logic are available. Power awareness indicates the ability of the system power to scale with changing conditions and quality requirements. Scalability is an important figure-of-merit since it allows the end user to implement operational policy just like the user of mobile multimedia equipment needs to select between better quality and longer battery operation time. This dissertation discusses power /energy optimization and performs analysis on both synchronous and asynchronous logic

Notes

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Graduation Date

2004

Semester

Spring

Advisor

Yuan, Jiann-Shiun

Degree

Doctor of Philosophy (Ph.D.)

College

College of Engineering and Computer Science

Department

Electrical and Computer Engineering

Degree Program

Electrical and Computer Engineering

Format

PDF

Language

English

Rights

Written permission granted by copyright holder to the University of Central Florida Libraries to digitize and distribute for nonprofit, educational purposes.

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Identifier

DP0001720

Subjects

Engineering -- Dissertations, Academic; Dissertations, Academic -- Engineering

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