Germanium, Metal oxide semiconductor field effect transistors, Silicon
With the development of modern electronics, the demand for high quality power supplies has become more urgent than ever. For power MOSFETs, maintaining the trend of reducing on-state resistance (conduction loss) without sacrificing switching performance is a severe challenge. In this work, our research is focused on implementing strained silicon and silicon germanium in power MOFETs to enhance carrier mobility, thus achieving the goal of reducing specific on-state resistance. We propose an N-channel super-lattice trench MOSFET, a P-channel sidewall channel trench MOSFET and P-Channel LDMOS with strained Si/SiGe channels. A set of fabrication processes highly compatible with conventional Si technology is developed to fabricate proposed devices. The mobility enhancement is observed to be 20%, 40% and 35% respectively for N-channel, Pchannel trench MOSFET and LDMOS respectively and the on-state resistance is reduced by 10%, 20% and 22% without sacrificing other device performance parameters.
If this is your thesis or dissertation, and want to learn how to access it or for more information about readership statistics, contact us at STARS@ucf.edu
Shen, Zheng (John)
Doctor of Philosophy (Ph.D.)
College of Engineering and Computer Science
Length of Campus-only Access
Doctoral Dissertation (Open Access)
Dissertations, Academic -- Engineering and Computer Science, Engineering and Computer Science -- Dissertations, Academic
Sun, Shan, "Power Metal-oxide-semiconductor Field-effect Transistor With Strained Silicon And Silicon Germanium Channel" (2010). Electronic Theses and Dissertations. 1681.