ORCID

0009-0003-5534-6762

Keywords

Photonic Computing, Photonics, Optical Computing, Fixed Point Computing, Analog Computing

Abstract

Photonic processing is a compelling approach to address the increasing computational requirements of neural networks, promising increased processing speed and better energy efficiency for operations such as matrix-vector multiplication. However, in practice the limitations of photonic hardware necessitate that these systems adopt fixed-point encoding rather than the floating-point standard used by digital electronics. The reduction in accuracy incurred by this requirement must be managed and addressed for real world applications. In this work, we present a reconfigurable, scalable, and parallelizable photonic multiplier cell using coherent balanced photodetection of analog signals to produce signed multiplications. This style of system outperforms other optical matrix-vector multiplication by requiring less precalculation for matrix loading and avoiding the accumulation of error. Using techniques such as precision decomposition, iterative algorithms, and the Extended Kalman Filter, we demonstrate three applications which predict future performance comparable to digital floating point systems: a fixed-point eigensolver which emphasizes the suitability of sparse matrices for photonic processing, a photonic floating point iterative solver which excels at finding roots and can be applied to direct evaluation of neural networks, and a fixed-point neural network evaluator which provides nonlinear corrections to observations of physical systems. All experiments are performed on the same reconfigurable architecture, demonstrating adaptability and laying the framework for future photonic processing systems.

Completion Date

2025

Semester

Fall

Committee Chair

Pang, Shuo

Degree

Doctor of Philosophy (Ph.D.)

College

College of Optics and Photonics

Department

Optics and Photonics

Format

PDF

Identifier

DP0029807

Document Type

Thesis

Campus Location

Orlando (Main) Campus

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