Modeling of direct tunneling and surface roughness effects on C-V characteristics of ultra-thin gate MOS capacitors

    Authors

    J. L. Zhang; J. S. Yuan; Y. Ma;A. S. Oates

    Comments

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    Abbreviated Journal Title

    Solid-State Electron.

    Keywords

    OXIDE THICKNESS; NM; Engineering, Electrical & Electronic; Physics, Applied; Physics, ; Condensed Matter

    Abstract

    Effects of direct tunneling and surface roughness on the capacitance-voltage characteristics of ultra-thin gate deep submicron MOS transistors have been studied. An improved equivalent circuit model to account for surface roughness and direct tunneling on the ultra-thin gate MOS capacitors in a unified manner is proposed. The capacitance subject to direct tunneling and surface roughness effect is smaller than that without surface roughness effect. (C) 2001 Elsevier Science Ltd. All rights reserved.

    Journal Title

    Solid-State Electronics

    Volume

    45

    Issue/Number

    2

    Publication Date

    1-1-2001

    Document Type

    Article

    Language

    English

    First Page

    373

    Last Page

    377

    WOS Identifier

    WOS:000167775000026

    ISSN

    0038-1101

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