VHDL design of computer vision tasks

Abstract

Field Programmable Gate Arrays (FPGAs) offer a new opportunity for computer vision algorithms. By implementing in Very High Speed Integrated Circuit Hardware Description languate (VHDL), algorithms can be developed quickly, while being running much faster than by using conventional Von Neumann machines (such as a Personal Computer or Macintosh). The process of creating a working design from an algorithm is described in detail, and we present experimental results obtained from such a process for Sobel edge detection, as well as modifications for techniques for background modeling and fire detection.

Notes

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Thesis Completion

2001

Semester

Summer

Advisor

Shah, Mubarak

Degree

Bachelor of Science (B.S.)

College

College of Engineering

Degree Program

Computer Science

Subjects

Dissertations, Academic -- Engineering;Engineering -- Dissertations, Academic

Format

Print

Identifier

DP0021685

Language

English

Access Status

Open Access

Length of Campus-only Access

None

Document Type

Honors in the Major Thesis

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