VHDL design of computer vision tasks
Field Programmable Gate Arrays (FPGAs) offer a new opportunity for computer vision algorithms. By implementing in Very High Speed Integrated Circuit Hardware Description languate (VHDL), algorithms can be developed quickly, while being running much faster than by using conventional Von Neumann machines (such as a Personal Computer or Macintosh). The process of creating a working design from an algorithm is described in detail, and we present experimental results obtained from such a process for Sobel edge detection, as well as modifications for techniques for background modeling and fire detection.
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Bachelor of Science (B.S.)
College of Engineering
Dissertations, Academic -- Engineering;Engineering -- Dissertations, Academic
Length of Campus-only Access
Honors in the Major Thesis
Phillips, Walter, "VHDL design of computer vision tasks" (2001). HIM 1990-2015. 284.