Design and implementationa of a stereo graphic equalizer using real time digital signal processing
Abstract
This paper is meant to present the design and implementation of a graphic equalizer using digital signal processing technology. A brief review of analog versus digital design and implementation will be introduced. The issues of design of the filter equations and the implementation of this design are covered, as well as a detailed discussion of the processor used, the DSP56002. The primary issues of concern with digital design that are identified are coefficient quantization and frequency warping. Coefficient quantization caused by finite word length is analyzed and a method for minimizing it is devised. The effects or frequency warping are analyzed. The different architectures available for implementation are presented. The software design issues of the DSP56002 are discussed, and the method for implementing the filter architectures with a detailed discussion of memory management is shown. Filter algorithms used to implement the filter equations of the equalizer will be developed in detail. Finally, an example equalizer implementation on a personal (IBM) computer will be presented. All topics dealing with the realization and implementation will be discussed in greater than normal detail with the intent of providing this paper as an educational example.
Notes
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Thesis Completion
1995
Semester
Fall
Advisor
Kasparis, Takis
Degree
Bachelor of Science (B.S.)
College
College of Engineering
Degree Program
Electrical Engineering
Subjects
Dissertations, Academic -- Engineering;Engineering -- Dissertations, Academic
Format
Identifier
DP0021440
Language
English
Access Status
Open Access
Length of Campus-only Access
None
Document Type
Honors in the Major Thesis
Recommended Citation
Erickson, Sean David, "Design and implementationa of a stereo graphic equalizer using real time digital signal processing" (1995). HIM 1990-2015. 59.
https://stars.library.ucf.edu/honorstheses1990-2015/59