VHDL implementation of the inmos transputer link

Abstract

The VHSIC Hardware Description Language (VHDL) started out as a documentation tool for digital systems. Since its publication as an IEEE standard, VHDL has gained wide acceptance in industry as the only nonproprietary hardware description language. This acceptance is moving VHDL away from being simply a documentation tool and toward the design environment. The utility of VHDL as a design tool is explored through modelling the operation of the lnmos Transputer link and the analog effects of a transmission line. The features of VHDL are found adequate to describe the operation of the Transputer link and a lossless transmission line. Several limitations of standard VHDL are revealed which restrict VHDL's suitability as a design tool. These limitations include mathematical function shortfalls, digital data representation, and lack of validation. The current definition of the language does not, however, prevent the designer from incorporating these capabilities into his or her design environment.

Notes

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Graduation Date

1991

Semester

Spring

Advisor

Petrasko, Brian E.

Degree

Master of Science (M.S.)

College

College of Engineering

Department

Electrical Engineering

Degree Program

Electrical Engineering

Format

PDF

Pages

142 p.

Language

English

Length of Campus-only Access

None

Access Status

Masters Thesis (Open Access)

Identifier

DP0029069

Subjects

Dissertations, Academic -- Engineering; Engineering -- Dissertations, Academic

Accessibility Status

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