Low noise design of a buffered direct injection transconductance preamplifier for a focal plane array

Abstract

Buffered direct injection (BDI) common gate transconductance preamplifiers are typically used to couple infrared focal plane arrays to signal processing circuitry. This yields improved charge transfer efficiency over other methods of charge coupled device (CCD) readout. The use of CMOS technology in this stage is common due to the ease of implementing the design on VLSI integrated circuits. Crucial to the design of any detector preamplifier is its noise performance. The preamplifier's noise should be less than that of the detector in order to minimize system noise performance. CMOS integrated circuits however, are inherently noisy, especially at low frequencies where they are susceptible tq 1/f noise. This paper presents a computer aided design of an active-load, long-tail pair difference amplifier input stage to an operational amplifier. This design is based on a user specified noise performance for the system. The program produces the required physical dimensions of the transistors of the operational amplifier input stage. It also provides the electrical characteristics of the transistors for simulation purposes. The noise performance of the preamplifier is reviewed and the experimental results of a method of 1/f noise reduction using chopper-stabilization is presented.

Notes

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Graduation Date

1989

Semester

Spring

Advisor

Martin, Robert J.

Degree

Master of Science (M.S.)

College

College of Engineering

Department

Electrical Engineering and Communication Sciences

Format

PDF

Pages

72 p.

Language

English

Length of Campus-only Access

None

Access Status

Masters Thesis (Open Access)

Identifier

DP0027222

Subjects

Dissertations, Academic -- Engineering; Engineering -- Dissertations, Academic

Accessibility Status

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