Abstract
Very large scale integrated (VLSI) circuit technology has offered the opportunity to design algorithms and data structures for direct implementation in integrated circuits. In order to take full advantage of this opportunity, the designer must understand the geometric limitations of the technology. Because the interconnections between components in a VLSI circuit are costly in both chip area and performance, the designer must consider the complexity of the data paths between components when selecting algorithms and architecture.
Systolic architectures offer a way to implement massively parallel special-purpose systems in VLSI circuits while minimizing costly interconnections between processing components. In a systolic system, data flows from memory in a rhythmic fashion, passing through many processing elements before it returns to memory.
Some of the architectural issues of VLSI design are presented, and the applications and advantages of systolic architectures in the design of special-purpose hardware using VLSI technology are discussed. A systolic priority queue and a systolic array for band matrix multiplication are presented as application examples.
Notes
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Graduation Date
1986
Semester
Fall
Advisor
Petrasko, Brian E.
Degree
Master of Science (M.S.)
College
College of Engineering
Format
Pages
30 p.
Language
English
Rights
Public Domain
Length of Campus-only Access
None
Access Status
Masters Thesis (Open Access)
Identifier
DP0020384
STARS Citation
Manno, Steven V., "The Application of Systolic Architectures in VLSI Design" (1986). Retrospective Theses and Dissertations. 4974.
https://stars.library.ucf.edu/rtd/4974
Contributor (Linked data)
University of Central Florida. College of Engineering [VIAF]
Accessibility Status
Searchable text