Abstract

This thesis discusses and presents the design of systolic arrays used in modern real time signal processing. A methodology to map a given algorithm into a systolized VLSI implementation is described. The architectural alternatives for a given signal processing algorithm are discussed and investigated at a function level using a simulation package that has been developed using the “C” programming language. The similarities and differences between wavefront array processors and systolic array processors are presented.

Notes

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Graduation Date

1987

Semester

Fall

Advisor

Petrasko, Brian E.

Degree

Master of Science (M.S.)

College

College of Engineering

Format

PDF

Pages

114 p.

Language

English

Rights

Public Domain

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Identifier

DP0020595

Accessibility Status

Searchable text

Included in

Engineering Commons

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