Iterative ring and power-aware design techniques for self-timed digital circuits

Author

Weidong Kuang, University of Central Florida

Keywords

Asynchronous circuits -- Design and construction; Logic circuits

Notes

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Graduation Date

Fall 2003

Advisor

Yuan, Jiann S.

Degree

Doctor of Philosophy (Ph.D.)

College

College of Engineering

Department

Mechanical, Materials, and Aerospace Engineering

Format

Print

Pages

125 p.

Language

English

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Subjects

Dissertations, Academic -- Engineering; Engineering -- Dissertations, Academic

STARS Citation

Kuang, Weidong, "Iterative ring and power-aware design techniques for self-timed digital circuits" (2003). Retrospective Theses and Dissertations. 900.
https://stars.library.ucf.edu/rtd/900