Title

High Speed Implementation Of Matrix Inversion Algorithms In Orthogonal Systolic Architectures.

Abstract

The implementation of matrix inversion algorithms using the few instructions, multiple data, systolic architecture concept is presented. Specifically, two matrix inversion algorithms, one general and one for symmetric matrices, are implemented and incorporated in the architecture. To achieve high computational throughput, the systolic architecture is implemented using the logarithmic number system.

Publication Date

1-1-1988

Publication Title

Conference Proceedings - IEEE SOUTHEASTCON

Number of Pages

200-204

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

0023827375 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0023827375

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