Title

Unified Four-Terminal Jfet Static Model For Circuit Simulation

Abstract

Junction field-effect transistors (JFETs) are useful for signal mixing purposes because of the isolated top- and bottom-gate terminals in such devices. Difficulties often arise, however, when one simulates the operation of a four-terminal JFET because the conventional JFET model treats the top and bottom gates as a single terminal. In this paper, a unified four-terminal JFET static model covering both linear and saturation regions is developed. The model also includes important device physics such as subthreshold behavior and asymmetrical top- and bottom-gate depletion layer thicknesses. Experimental data measured from JFETs fabricated at Harris Semiconductor is included in support of the model.

Publication Date

12-1-1990

Publication Title

Modeling and Simulation, Proceedings of the Annual Pittsburgh Conference

Volume

21

Issue

pt 4

Number of Pages

1789-1793

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

0025564205 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0025564205

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