Title

An improved model for four-terminal junction field-effect transistors

Abstract

The junction field-effect transistor (JFET) has isolated top-and bottom-gate terminals and therefore is useful for signal mixing applications. Existing models for the four-terminal JFET often have the same form as the three-terminal JFET model, however, in which only a single pinch-off voltage is used to describe the current-voltage characteristics. In this paper, a more general four-terminal JFET model is developed. Two different pinch-off voltages are involved in the improved model to account more comprehensively for the effects of both depletion regions associated with the top- and bottom-gate junctions. Results simulated from a device simulator are also included in support of the model. ©1996 IEEE.

Publication Date

12-1-1996

Publication Title

IEEE Transactions on Electron Devices

Volume

43

Issue

8

Number of Pages

1309-1311

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/16.506786

Socpus ID

0030214202 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0030214202

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