Title

Boost power factor correction circuits

Abstract

In this paper, we present two modified boost converter topologies to be used as power factor correction circuits. Zero-voltage switching and proper transformer-core resetting are achieved utilizing the parasitic capacitance of the switch and the magnetization inductance of the transformer. Steady state analysis for the two circuits will be given. To verify our theoretical approval, simulation results will be reported.

Publication Date

1-1-1994

Publication Title

Southcon Conference Record

Number of Pages

552-559

Document Type

Article; Proceedings Paper

Identifier

scopus

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/southc.1994.498165

Socpus ID

0028737046 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0028737046

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