Title
Boost Derived Topology As A Power Factor Correction Circuit
Abstract
This paper proposes a novel PWM converter which is a modified version of the conventional boost topology with output electrical isolation and zero-voltage switching (ZVS). The steady-state analysis and the control characteristic curves will be presented. Also we will present a closed loop system for the converter as a Power Factor Correction Circuit(PFCC) application. The system uses voltage referencing and current sensing. This is achieved by implementing the commercially available chip ML4821(Average Current Mode Controller) in the closed loop system. Circuit simulation based on PSPICE of the proposed topology will be given. It will be shown that the simulation and theoretical results are in agreement.
Publication Date
1-1-1994
Publication Title
Conference Proceedings - IEEE SOUTHEASTCON
Number of Pages
175-179
Document Type
Article; Proceedings Paper
Identifier
scopus
Personal Identifier
scopus
Copyright Status
Unknown
Socpus ID
0028185157 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/0028185157
STARS Citation
Khan, Aslam F.; Batarseh, Issa; and Siri, Kasemsan, "Boost Derived Topology As A Power Factor Correction Circuit" (1994). Scopus Export 1990s. 402.
https://stars.library.ucf.edu/scopus1990/402