Title

Low-Temperature Bicmos Gate Pull-Down Delay Analysis

Abstract

Temperature-dependent BiCMOS gate delay analysis including high current transient has been developed. The model accounts for the high electric field effect in the nMOS transistor and high current effects in the bipolar transistor for a wide temperature range. In examining the switching transient of a BiCMOS driver, the base pushout mechanism exhibits a detrimental effect on the gate propagation delay at room temperature, while the current gain degradation and temperature-dependent intrinsic density are responsible for increasing the BiCMOS gate pulldown delay at low temperature. The analytical equations provide evaluation of the sensitivity of process and device parameters to circuit performance at different temperatures. Computer simulation of a BiNMOS driver using the present analysis is compared with a PISCES simulation in support of the physical reasoning. © 1994 Taylor & Francis Ltd.

Publication Date

1-1-1994

Publication Title

International Journal of Electronics

Volume

76

Issue

2

Number of Pages

221-232

Document Type

Article

Identifier

scopus

Personal Identifier

scopus

DOI Link

https://doi.org/10.1080/00207219408925920

Socpus ID

0028381535 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0028381535

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