Title

Design And Implementation Of A Random Neural Network Routing Engine

Keywords

Network processors; Neural network; Packet switched networks; Random neural networks

Abstract

Random neural network (RNN) is an analytically tractable spiked neural network model that has been implemented in software for a wide range of applications for over a decade. This paper presents the hardware implementation of the RNN model. Recently, cognitive packet networks (CPN) is proposed as an alternative packet network architecture where there is no routing table, instead RNN based reinforcement learning is used to route packets. Particularly, we describe implementation details for the RNN based routing engine of a CPN network processor chip: the smart packet processor (SPP). The SPP is a dual port device that stores, modifies, and interprets the defining characteristics of multiple RNN models. In addition to hardware design improvements over the software implementation such as dual access memory, output calculation step, reduced output calculation module, this paper introduces a major modification to the reinforcement learning algorithm used in the original CPN specification such that the number of weight terms are reduced from 2n2 to 2n. This not only yields significant memory savings, but it also simplifies the calculations for the steady state probabilities (neuron outputs in RNN). Simulations have been conducted to confirm the proper functionality for the isolated SPP design as well as for the multiple SPP's in a networked environment.

Publication Date

9-1-2003

Publication Title

IEEE Transactions on Neural Networks

Volume

14

Issue

5

Number of Pages

1128-1143

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TNN.2003.816366

Socpus ID

0242611597 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0242611597

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