Title

Analyzing Internal-Switching Induced Simultaneous Switching Noise

Keywords

Analytical models; Circuit noise; Circuit simulation; Impedance; Inductance; MOSFETs; Negative feedback; Rails; Switching circuits; Wire

Abstract

The internal-switching induced simultaneous switching noise (SSN) is studied in the paper. Unlike ground bounce caused by driving off-chip loading, both power-rail and ground-rail wire/pin impedances are important in evaluating internal SSN, and the double negative feedback mechanism should be accounted for. Based on the lumped-model analysis and taking into account the parasitic effects and velocity-saturation effect of MOS transistors, a novel analytical model is developed which includes both switching and non-switching gates. The proposed model is employed to analyze on-chip decoupling capacitance, wire/pin inductance effect and loading effect analytically. Good agreements with SPICE simulations are obtained for submicron technology.

Publication Date

1-1-2003

Publication Title

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volume

2003-January

Number of Pages

410-415

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ISQED.2003.1194768

Socpus ID

14644431680 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/14644431680

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