Title

Modeling Of Mismatch Effect In Submicron Mosfets Based On Bsim3 Model And Parametric Tests

Keywords

Analog circuits; BSIM3v3 model; Modeling; MOS transistor mismatch

Abstract

Mismatch between identically designed MOS transistors plays an important role in the performance of analog circuits. This paper reports a MOS transistor mismatch model applicable for submicron CMOS technology and developed based on the industry standard BSIM3v3 model. A quick way to estimate drain current mismatch based on parametric test data was also suggested.

Publication Date

3-1-2001

Publication Title

IEEE Electron Device Letters

Volume

22

Issue

3

Number of Pages

133-135

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/55.910620

Socpus ID

0035280113 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0035280113

This document is currently not available here.

Share

COinS