Title

Asm Charts In Vhdl

Abstract

Although state diagrams tend to be very popular in state machine design, be it in conjunction with schematic capture or HDL-type (Hardware Description Language) input, the authors have found the use of ASM (Algorithmic State Machine) charts to be more useful and instructive. This article addresses this issue and shows an illustrative example. It also discusses the various obvious as well as some of the more subtle advantages of this approach. In addition in this lab-intensive course, "Digital Systems" which follows "Introduction to Digital Logic", emphasis is put on the careful interpretation of simulation results, which otherwise the students either ignore or at best treat rather nonchalantly. The example used in this article illustrates both aspects.

Publication Date

10-1-2004

Publication Title

Computers in Education Journal

Volume

14

Issue

4

Number of Pages

22-29

Document Type

Article

Personal Identifier

scopus

Socpus ID

8344259055 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/8344259055

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