Title

Modelling And Analysis Of Ground Bounce Due To Internal Gate Switching

Abstract

Ground bounce noise due to internal gate switching is studied. Unlike the ground bounce caused by switching of the output buffer, both power-rail and ground-rail impedances are important, and a double negative feedback mechanism must be considered. Based on the lumped-model analysis and taking into account the parasitic and velocity-saturation effects of MOS transistors, an analytical model is developed including both switching and non-switching gates. The proposed model is employed to analyse the on-chip decoupling capacitance, resonant frequency, wire/pin inductance and loading effect. Good agreement between the model predictions and SPICE simulation results is obtained. © IEE, 2004.

Publication Date

8-1-2004

Publication Title

IEE Proceedings: Circuits, Devices and Systems

Volume

151

Issue

4

Number of Pages

300-306

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1049/ip-cds:20040190

Socpus ID

5044245072 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/5044245072

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