Title

Compact Mosfet Model For Electrostatic Discharge (Esd) Applications

Abstract

Electrostatic discharge (ESD) is a critical reliability concern for microchips. This paper presents a computer-aided design tool for ESD protection design and applications. Specifically, we develop an improved and robust MOS model and implement such a model into the industry standard Cadence SPICE for ESD circuit simulation. Experimental data measured from the transmission line pulsing (TLP) technique and human body model (HBM) tester are included in support of the model.

Publication Date

12-1-2006

Publication Title

Semiconductor Technology, ISTC2007 - Proceedings of the 6th International Conference on Semiconductor Technology

Number of Pages

413-417

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

58449104787 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/58449104787

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