Title
An Improved Junction Capacitance Model For Junction Field-Effect Transistors
Keywords
Compact modeling; Junction capacitance; Junction field-effect transistor
Abstract
A new junction capacitance model for the four-terminal junction field-effect transistor (JFET) is presented. With a single expression, the model, which is valid for different temperatures and a wide range of bias conditions, describes correctly the JFET junction capacitance behavior and capacitance drop-off phenomenon. The model has been verified using experimental data measured at Texas Instruments. © 2006 Elsevier Ltd. All rights reserved.
Publication Date
7-1-2006
Publication Title
Solid-State Electronics
Volume
50
Issue
7-8
Number of Pages
1395-1399
Document Type
Article
Personal Identifier
scopus
DOI Link
https://doi.org/10.1016/j.sse.2006.05.024
Copyright Status
Unknown
Socpus ID
33747167319 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/33747167319
STARS Citation
Ding, Hao; Liou, Juin J.; Cirba, Claude R.; and Green, Keith, "An Improved Junction Capacitance Model For Junction Field-Effect Transistors" (2006). Scopus Export 2000s. 8080.
https://stars.library.ucf.edu/scopus2000/8080