Title

Analysis Of Safe Operating Area Of Nldmos And Pldmos Transistors Subject To Transient Stresses

Keywords

Laterally diffused metaloxidesemiconductor (LDMOS); transient safe operating area (TSOA); transmission line pulsing (TLP); very fast transmission line pulse (VFTLP)

Abstract

Transient safe operating area (TSOA) of n-type and p-type laterally diffused metaloxidesemiconductor (LDMOS) subject to transient stresses is presented for electrostatic discharge applications. LDMOS devices connected in the gate-grounded and gate-biased configurations are stressed with 1-, 2-, 5-, 10-, and 100-ns duration transmission line pulses, and a methodology to develop an effective and accurate TSOA based on these measurements is discussed. Two-dimensional technology computer-aided design simulations are also used to discuss critical physical mechanisms governing the current conduction during the transients and the condition that finally leads to device failure beyond the TSOA. © 2006 IEEE.

Publication Date

10-1-2010

Publication Title

IEEE Transactions on Electron Devices

Volume

57

Issue

10

Number of Pages

2655-2663

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TED.2010.2058310

Socpus ID

77956990634 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/77956990634

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