Title

Gate-Level Netlist Reverse Engineering For Hardware Security: Control Logic Register Identification

Abstract

The heavy reliance on third-party resources, including third-party IP cores and fabrication foundries, has triggered the security concerns that design backdoors and/or hardware Trojans may be inserted into fabricated chips. While existing reverse engineering tools can help recover netlist from fabricated chips, there is a lack of efficient tools to further analyze the netlist for malicious logic detection and full functionality recovery. While it is relatively easy to identify the functional modules from the netlist using pattern matching methods, the main obstacle is to isolate control logic registers and reverseengineering the control logic. Upon this request, we proposed a topology-based computational method for register categorization. Through this proposed algorithm, we can differentiate data registers from control logic registers such that the control logic can be separated from the datapath. Experimental results showed that the suggested method was capable of identifying control logic registers in circuits with various complexities ranging from the RS232 core to the 8051 microprocessor.

Publication Date

7-29-2016

Publication Title

Proceedings - IEEE International Symposium on Circuits and Systems

Volume

2016-July

Number of Pages

1334-1337

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ISCAS.2016.7527495

Socpus ID

84983384883 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84983384883

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