Netlist Reverse Engineering For High-Level Functionality Reconstruction
Abstract
In a modern IC design flow, from specification development to chip fabrication, various security threats are emergent. Of particular concern are modifications made to third-party IP cores and commercial off-the-shelf (COTS) chips where no golden models are available for comparisons. Toward this direction, we develop a tool, named Reverse Engineering Finite State Machine (REFSM), that helps end-users reconstruct a high-level description of the control logic from a flattened netlist. We demonstrate that REFSM effectively recovers circuit control logic from netlists with varying degrees of complexity. Experimental results also showed that the developed tool can easily identify malicious logic from a flattened (or even obfuscated) netlist. If combined with chip level reverse engineering techniques, the developed REFSM tool can help detect the insertion of hardware Trojans in fabricated circuits.
Publication Date
3-7-2016
Publication Title
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume
25-28-January-2016
Number of Pages
655-660
Document Type
Article; Proceedings Paper
Personal Identifier
scopus
DOI Link
https://doi.org/10.1109/ASPDAC.2016.7428086
Copyright Status
Unknown
Socpus ID
84996605914 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/84996605914
STARS Citation
Meade, Travis; Zhang, Shaojie; and Jin, Yier, "Netlist Reverse Engineering For High-Level Functionality Reconstruction" (2016). Scopus Export 2015-2019. 4507.
https://stars.library.ucf.edu/scopus2015/4507