Gate-Level Netlist Reverse Engineering Tool Set For Functionality Recovery And Malicious Logic Detection

Abstract

Reliance on third-party resources, including third-party IP cores and fabrication foundries, as well as wide usage of commercial-off-the-shelf (COTS) components has raised concerns that backdoors and/or hardware Trojans may be inserted into fabricated chips. Defending against hardware backdoors and/or Trojans has primarily focused on detection at various stages in the supply chain. Netlist reverse engineering tools have been investigated as an alternative to existing chip-level reverse engineering methods which can help recover functional netlists from fabricated chips, but fall short of detecting malicious logic or recovering high-level functionality. In this work, we develop a netlist reverse engineering tool-set which recovers high-level functionality from the netlist, thereby aiding malicious logic detection. The tool-set performs state register identification, control logic recovery and datapath tracking, which facilitates validation of encrypted/obfuscated hardware IP cores. Relying on 3-SAT algorithms and topology-based computational methods, we demonstrate that the developed tool-set can handle netlists of various complexities.

Publication Date

1-1-2016

Publication Title

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Number of Pages

342-346

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

85018245946 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85018245946

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