Radiation-Hardened Mram-Based Lut For Non-Volatile Fpga Soft Error Mitigation With Multi-Node Upset Tolerance

Keywords

lookup table (LUT); magnetic random access memory (MRAM); multi-node upset (MNU); radiationhardening; single event upset (SEU); soft error; spin Hall effect

Abstract

In this paper, we have developed a radiation-hardened non-volatile lookup table (LUT) circuit utilizing spin Hall effect (SHE)-magnetic random access memory (MRAM) devices. The design is motivated by modeling the effect of radiation particles striking hybrid complementary metal oxide semiconductor/spin based circuits, and the resistive behavior of SHE-MRAM devices via established and precise physics equations. The models developed are leveraged in the SPICE circuit simulator to verify the functionality of the proposed design. The proposed hardening technique is based on using feedback transistors, as well as increasing the radiation capacity of the sensitive nodes. Simulation results show that our proposed LUT circuit can achieve multiple node upset (MNU) tolerance with more than 38% and 60% power-delay product improvement as well as 26% and 50% reduction in device count compared to the previous energy-efficient radiation-hardened LUT designs. Finally, we have performed a process variation analysis showing that the MNU immunity of our proposed circuit is realized at the cost of increased susceptibility to transistor and MRAM variations compared to an unprotected LUT design.

Publication Date

11-27-2017

Publication Title

Journal of Physics D: Applied Physics

Volume

50

Issue

50

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1088/1361-6463/aa9781

Socpus ID

85038210894 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85038210894

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