Rimpa: A New Reconfigurable Dual-Mode In-Memory Processing Architecture With Spin Hall Effect-Driven Domain Wall Motion Device

Keywords

Domain wall motion; in-memory processing platform.; spin Hall effect (SHE)

Abstract

This paper presents a new Reconfigurable dualmode In-Memory Processing Architecture based on spin Hall effect-driven domain wall motion device called RIMPA. In this architecture, a portion of spintronic memory array can be reconfigured to either non-volatile memory or in-memory logic. Accordingly, computation can be performed within memory without long distance data transfer or large in-memory logic area overhead concerning conventional Von-Neumann or in-memory computing architecture, respectively. The device to architecture simulation results show that, with 17% area increase, RIMPA improves the operating energy by 72.2% as compared with the conventional non-volatile in-memory logic schemes. We show that the Advanced Encryption Standard (AES) algorithm which is widely used in secure big data storage, can be efficiently mapped to RIMPA with 68.8% and 20.8% energy saving in comparison to CMOS-ASIC and recent DW-AES implementations, respectively.

Publication Date

7-20-2017

Publication Title

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

Volume

2017-July

Number of Pages

45-50

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ISVLSI.2017.18

Socpus ID

85027245180 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85027245180

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